Drawing: |
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Earlier published in: |
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IEC 60617-12 (ed.3.0) 12-28-12 |
Description (temporary field): |
EN |
Parity generator/checker with complementary outputs
(e.g. SN 74280) |
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FR |
Générateur/contrôleur de parité avec sorties complémentaires
(modèle d'antériorité : SN 74280) |
Name: |
EN |
Parity generator/checker with complementary outputs |
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FR |
Générateur/contrôleur de parité avec sorties complémentaires |
Alternative names: |
EN |
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FR |
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Keywords: |
EN |
binary logic circuits; combinative circuits |
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FR |
circuits combinatoires, circuits logiques binaires |
Form: |
EN |
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FR |
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Alternative forms: |
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Applied in: |
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Applies: |
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S01469, S01573 |
Application notes: |
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A00269 |
Source references: |
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Published in: |
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Entered on: |
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2003-11-28 |
Evaluated on: |
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2003-11-28 |
Released on: |
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2004-09-01 |
Rejected on: |
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Obsolete from: |
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Proposed by: |
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TC3 |
Replaces: |
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Replaced by: |
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Shape class: |
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Characters, Rectangles |
Function class: |
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K Processing signals or information |
Application class: |
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Circuit diagrams, Function diagrams |
Symbol restrictions: |
EN |
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FR |
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Remarks: |
EN |
(e.g. SN 74280) |
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FR |
(modèle d'antériorité : SN 74280) |
Change requests: |
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C00112, C00189 |