Drawing: |
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Earlier published in: |
. |
IEC 60617-12 (ed.3.0) 12-49-06 |
Description (temporary field): |
EN |
Shift register with parallel load, 8-bit
(e.g. SN 74165) |
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FR |
Registre à décalage à chargement parallèle, à 8 étages
(modèle d’antériorité : SN 74165) |
Name: |
EN |
Shift register with parallel load, 8-bit |
|
FR |
Registre à décalage à chargement parallèle, à 8 étages |
Alternative names: |
EN |
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FR |
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Keywords: |
EN |
binary logic circuits; registers |
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FR |
circuits logiques binaires, registres |
Form: |
EN |
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FR |
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Alternative forms: |
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Applied in: |
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Applies: |
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S01464, S01474, S01558, S01567, S01810 |
Application notes: |
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A00269 |
Source references: |
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Published in: |
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Entered on: |
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2004-05-04 |
Evaluated on: |
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2004-05-04 |
Released on: |
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2004-09-03 |
Rejected on: |
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Obsolete from: |
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Proposed by: |
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TC3 |
Replaces: |
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Replaced by: |
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Shape class: |
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Characters, Rectangles |
Function class: |
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K Processing signals or information |
Application class: |
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Circuit diagrams, Function diagrams |
Symbol restrictions: |
EN |
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FR |
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Remarks: |
EN |
E.g. SN 74165. |
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FR |
Modèle d’antériorité : SN 74165. |
Change requests: |
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C00121, C00189 |